In image processing, audio processing, mobile terminal, or other information communication apparatuses or processing apparatuses, an integrated circuit devices configured by logic elements and memory elements are being required to offer higher performance such as higher integration, higher speed, and improved functions. Conventionally, these integrated circuit devices are configured by portions for performing the logic operations and portions configured by memory elements for temporarily storing data and instructions such as cache memories and main memories. Further, the portions for performing the logic operations are physically and two-dimensionally divided into spaces for each function such as integer operations, floating point operations, image processing, audio processing, data processing, and input/output. Further, the allocated space (domain) regions are fixed in advance. These integrated circuit devices with functions allocated to two-dimensional spaces in advance are mainly configured by MOS transistors.
In a conventional integrated circuit device provided with a logic circuit configured by MOS transistors and a memory region configured by a SRAM, a DRAM, and a flash memory, the roles of the elements are clearly divided between logic elements and memory elements. Further, the logic circuit is divided into space regions for each function such as integer operations, floating point operations, image processing, audio processing, data processing, and input/output. These space regions are fixed in advance.
In such a configuration, the degree of integration has been improved in each region by the methods explained below. For example, in the logic element circuit, the degree of integration has been improved by miniaturization of the gate length and miniaturization of the inter-gate pitch. Further, in the memory element region, for example, in a DRAM, the degree of integration has been improved by reducing the pitch between cells by the miniaturization of the capacitors holding the charges and COB (capacitor on bit line) structure cells.
However, the conventional integrated circuit devices having logic elements and memory elements mounted together suffer from the following disadvantages.
First, in the improvement of the degree of integration, since the structure is restricted to a two-dimensional plane, the area in the two-dimensional plane is limited to the exposure range of the exposure apparatus used for the production of the integrated circuit device. Accordingly, the number of mounted elements is limited.
Second, the roles of the elements are clearly divided spatially between logic elements and memory elements. Further, the logic element region is also fixed in the two-dimensional space for individual purposes. Therefore, in order to newly add functions and expand functions, it suffers from the disadvantage in that a plurality of integrated circuit devices must be prepared for the required functions.